Hello everyone,
I'm experiencing a strange behavior with the timer0 on my board, a
landtiger with a lpc1768.
The issue is the number MR0 of the counter in order to get a fixed
amount of delay and get an interrupt.
My configuration is as follow:
-) master clock source of 12Mhz (the crystal installed on the board)
and with the 'clock generation schematic' in debug i see the clock is
correctly chosen, the cclk is 100 Mhz and so the PCLK/1=100, PCLK/2
50 etc.
-)On my 'clock divid
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