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ARM: Unstable steps/breakpoints activity while debugging

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Dear everybody, Currently I am developing a custom chip based on Cortex M0. The chip has an external SRAM that functions as storage for applications and data. I did a test to make sure every bits in the SRAM is able to switch from 0 to 1 and back. I refer to this link for the code https://barrgroup.com/Embedded-Systems/How-To/Memory-Test-Suite-C I load the program to address 0x0 of my SRAM and do the test for address 0x1000 - 0x10000 (64 kB SRAM size, leaving the first 4 kB unt

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